CAD Technology Research Division
 
I. Introduction
 
CAD Research Division has been making efforts in the area of Computer-Aided Design since 1982 and it has a history of three decades. This division is located in the 9th district of East Main Building, with an area of 454.9 square meters. Now it have advanced commercial EDA software from Cadence, Synopsys, Silvaco, etc. and first-principles calclation software including VASP, CASTEP, SIESTA, etc. The division is also equipped with the Dell PowerEdge T410 and other workstations and more than 60 high-performance PCs.
 
Currently, CAD Research Division is in charge of a number of 973 and Major National Science & Technology Programs, and has close cooperation with domestic and foreign enterprises. We are tracking the latest technologies of integrated circuit, developing the corresponding models, and TCAD tools  We are also studing  models of CMOS millimeter wave components model and design methodology. Recently, we are engaged in the research of new types of memory devices such as RRAM and STT-RAM.
 
CAD Research Division now has 12 faculties including 11 teachers and 1 engineer. There are also a few retired teachers back to work actively in leading edge of research. Moreover, we have 1 post-doctoral, nearly 20 doctoral students and 30 graduate students.
 
CAD Research Division has undertaken 5 undergraduate courses and 3 graduate courses.
 
Director: Yin Shouyi
Tel: (010) 62794398
Fax: (010) 62781553
E-mail: yinsy@tsinghua.edu.cn
 
Associate Director: Zhang Jinyu
Tel: (010) 62771283
Fax: (010) 62771130
E-mail: zhangjinyu@tsinghua.edu.cn
  
II. Major projects in research

No.
Name of Project
Source of Task
People in charge or participants
01
Modeling and simulation on nanoscale new devices
973
Yu Zhiping
02
30 – 110GHz Si-based integrated circuit design and experimental implementation
973
Qian He
03
Millimeter and Submillimeter wave band Si-based active device modeling and circuit design method
973
Zhang Li
04
Advanced EDA platform development
Major National Science & Technology Programs
Yu Zhiping
05
Modeling and simulation on integrated circuit process variation
Major National Science & Technology Programs
Wang Yan
06
Novel structure devices physics,  modeling and simulation
973
Wang Yan
07
Carbon-based memory device and novel RF circuits design
973
Wang Yan
08
Quantum transport and high frequency performance in carbon nanotube
973
Wang Yan
09
Wafer level graphene material and devices
Major National Science & Technology Programs
Qian He
10
Study on inverse lithography technology for 22 nm technology
National Nature Science Foundation of China
Zhang Jinyu
11
Carbon-based RRAM research
National Nature Science Foundation of China
Qian He

 

 
III. Introduction of researches
1. Overview: 
 The research areas of CAD division is as follows in recent years(since 2005): 
 Compact model and parameter extraction of nanoscale MOS devices and passive elements.
 Quantum transport and compact models of nanoscale electronic devices.
 Theoretical and experimental research of new RRAM
 Theoretical and experimental research of carbon-based electronic devices
 Compact modeling of III-V compound semiconductor devices
 Process varation related modeling and simulation research
 Microwave / millimeter-wave elements and device modeling and circuit design methodology 
 High-performance embedded parallel computing and processor architectures 

We’re undertaking a number of 973, 863, Major National Science & Technology Programs and the National Natural Science Fundation projects and published a number of papers in the top level international conferences, including 3 IEDM, 4 DAC, 5 ICCAD, and more than 20 articles on the high level journals such as TED, EDL, APL, etc. in recent years. Many teachers were invited to join TPC and have invited reports in several conferences. In 2009, our division held the 13th International Computing Electronics conference (IWCE-2009). Professor Yu Zhiping was qualified as the IEEE fellow in 2008. 

2. Brief introduction to our research fields 
Compact model and parameter extraction for ultra-small feature size MOS devices and passive elements
We’ve studied the quantum mechanical effects in 20-50nm gate length MOS devices, and improve the related classical models considering quantum mechanics corrections. We set up the carrier mobility model in the strained silicon, compact models for dual-gate MOSFET, FINFET. We also set up compact models and developed parameter extraction tools for passive elements on chip such as inductors, transformers, transmission lines, etc. Related results have been published on EDL, TED, etc. Parts of our models and tools have been used in commercial software. 
  
Quantum transport and compact models of nanoscale electronic devices.
We’ve developed a device simulation software package based on quantum mechanics. This software can perform the simulation for nano electronic devices based on the energy band calculation and non-equilibrium Green's function (NEGF) quantum transporting theory. We’ve studied on material and device transport properties of CNT, graphene, GNR, silicon nanowire and so on. Related works have been published on high level international conferences and journals such as IEDM, APL, EDL, TED, etc.

 Theoretical and experimental research of nonvolatile resistance random access memory (RRAM)
We’ve developed a electric molecular dynamics (EMD) methodwhich can perform traditional molecular dynamics simulation coupling with electro and thermal equations. Utilizing this approach, we simulated switching behaviors of carbon-based resistance memory in the atomistic level. Currently, we are exploring the CMOS process compatible fabrication of transition metal and carbon based RRAM cell and circuits.
  
Compact modeling of III-V compound semiconductor devices
We’ve established a 2D GaN HEMT device analytical I-V, C-V models. In addition to the full set of threshold voltage-based model, we’ve developed a surface potential-based compact model, with good continuity and convergence. Moreover, we’ve set up a distributed GaN HEMT small-signal model, and proposed a set of simple but effective methods for parameters extraction and optimization. Related works have been published on the high level journals such as TED.
  
Process variation-related modeling and simulation research
Aiming at the impact of integrated circuit process variation to the circuit performance, we have studied gate delay statistical models during the static timing analysis, and leakage current analysis. Related works have been published on high level international conferences and journals such as DAC, ICCAD, and IEEE TCAD.
   
Microwave / millimeter-wave elements and device modeling and circuit design methodology study 
This project will design receive and transmit broadband front-end chips of 60GHz frequency band, using 65 nm RF-CMOS technology, and a short distance (less than 10 meters) wireless transmission RF chip and module system, with transmission speed greater than 3Gbps. Meanwhile, we will establish and complete the software/hardware developing environments such as 24-77GHz (covering the radar band of automobile collision avoidance system) MOS devices and elements models (including the transmission wire), millimeter wave simulation and test platform. Now we’ve produced 24GHz VCO, 24GHz frequency synthesizer for 60GHz high speed short range wireless transmission systems, 60GHz PA design and implementation, and design and modeling of passive elements on chip, like transmission wires, transformers, inductors and vertical inter-digital capacitors.

 SoC design tools, parallel EDA algorithms and high-performance computer architecture
 Cooperating with Intel, we’ve developed high speed system chip simulation tools, which can realize functions of Android mobile phone. Using the graphics processor (GPU), we’ve implement a series of high speed parallel EDA algorithms, which can significantly enhance the execution efficency of logic simulation, sparse matrix processing and timing analysis. At the same time, with the help of GPU, we can increase network routing and radar digital signal processing speed. We are exploring new high speed parallel computer architecture based on GPU architecture. Related works have been published on high level international conferences and journals such as DAC, ICCAD, IEEE Trans. on VLSI, Integration, etc.
 
  
IV. Teaching 
  
we have undertaken some undergraduate and graduate courses as follows
 

No
Course Name
Course Type
Class hours
Speaker
1
Solid State Physics
Undergraduate degree course
64
Wang Yan
2
Microelectronic Devices and Circuits
Undergraduate degree course
48
Zhang Jinyu
3
Semiconductor device electronics
Undergraduate degree course
48
Zhang Li, Xu Jun
4
VLSI CAD
Undergraduate non-degree course
48
Zhang Wenjun, He Hu
5
Microelectronics Manufacturing Technology
Undergraduate degree course
32
Qian He
6
Nano-electronic devices
Graduate non-degree course
48
Wang Yan
7
Latest progress in microelectronics
Graduate degree course
32
Deng Yangdong
8
IC CAD
Graduate non-degree course
48
Yu Zhiping, Ye Zuochang


Our division translated two foreign textbooks: Device Electronics for Integrate Circuit,and The Design of CMOS Radio-Frequency Integrated Circuits.

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